USB port JTAG programmer

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This little interface module allows the programming and debugging of many JTAG enabled devices using a PC with a USB port. Traditional JTAG programmer modules, like the CPLD-based programmer presented on this site attach to the parallel port of the PC. While this method allows for easy connectivity, it has many drawbacks. Many current PCs, espceially laptops don’t even have a parallel printer port any more. In most cases programming speeds are rather slow as well, which is problematic in interactive environments and with large devices.

This module solves both issues. It attaches to the USB port, which is available on almost every PC in use today. It works well with both laptop and desktop computer. The USB interface chip used on the board allows for JTAG datarates up to 6Mbps, which is significantly higher than most parallel port based solutions can offer.

The module is compatible with the OpenOCD project, which enables great integration with tools such as GDB and Eclipse CDT.


  • Standard USB interface
  • Integrated 3.3V power supply, running from the USB port
  • Can provide (3.3V) power for the target device
  • Supports programming port voltages down to 1.2V
  • Supported by GDB and Eclipse through the OpenOCD project


This document and all the accompanying design documentation (for example schematic and PCB files) are covered by the H-Storm Non-Commercial License (HSNCL).

H-Storm Non-Commercial License (HSNCL)

Copyright 2004-2007 Andras Tantos and Modular Circuits. All rights reserved.

Redistribution and use in source or binary forms, or incorporated into a physical (hardware) product, with or without modification, are permitted for non-commercial use only, provided that the following conditions are met:

  • The redistribution doesn’t result in financial gain.
  • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  • Redistributions in any other form must contain in printed or electronical format the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  • All advertising materials mentioning features or use of this technology must display the following acknowledgment:
    This product includes H-Storm technology developed by Andras Tantos and Modular Circuits.
  • Neither the name of Andras Tantos or Modular Circuits may be used to endorse or promote products derived from or using this technology without specific prior written permission.


Design description

USB interface

The heart of the circuit is the FT2232 dual-port USB-to-serial bridge from FTDI. While this chip was originally designed to provide standard RS-232 ports for PCs with only USB interfaces, it also has many additional features. One of these features is the support for the JTAG serial interface. This operating mode is used in this design to provide a USB to JTAG bridge.

JTAG interface

The outputs of the FT2232 chip are buffered by level-shifter gates to prodvide wide-range logic-level support. These devices, the SN74AVC4T245 and the SN74AVC2T45 can manage logical level-shifting between two power domains in the 1.2V to 3.3V range. One of the power domains is fixed 3.3V, and is connected to the power supply running the FT2232. The other domain can run from the same power supply or potentially run from an external power supply provided by the target board. In this latter operating mode arbitrary logic-levels can be used from 1.2V to 3.3V. A jumper can select between the internal or external power supply for the second power domain.

The outputs of the level-shifters can be disabled through software control, using some GPIO pins on the FT2232 device. The pins used make the device compatible with the JTagKey from Amontec.

Power supply

While the FT2232 chip contains an internal 3.3V regulator to allow for bus-powered operation, an external LDO regulator is used. This device, the IRU1207-33, can easily provide a couple of hundred mA-s, much more current than the built-in regulator of the USB bridge chip can deal with. This additional current-delivery capability allows the circuit to power the target circuit as well in many situations.

Other features

Two feedback LEDs are provided on the board. One shows the presence of the 3.3V power supply of the FTDI chip. Since this power is generated from the USB power, this LED pretty much shows if the device is connected to the PC.

Another LED shows the presence of the target power supply. If this supply is provided by the programmer, than this LED will always be turned on. However if the target provides its own power and powers the second power domain of the level shifters, than the LED monitors the presence of that power and can be used to visually verify that a target device is hooked up to the programmer. The LED is driven by a low turn-on level MOSFET, so it can accurately detect the presence of power supplies down to 1.2V. The power detection line is also hooked up to a GPIO pin of the FT2232 device so the presence of the target power can be verified programmatically.

Design files

Schematic and PCB in PDF format (HSNCL)

Other languages

Alisa Bagrii was kind enough to provide a Russian translation for this page. You can read it here:

Nadia Karbowska provided a Latvian translation, which is available here:

45 thoughts on “USB port JTAG programmer

  1. Hi I’m Paul and I’m a student at NEIT, Warwick, RI. I came across yout site, because I am in the need of a way to connect my CPLD that is an Altera MAX 7000 series PLD on a training board called the PLDT-2, to my laptop. It is JATG and but I’m still concerned about commpatability with the unit. Other info, we use the older version on Quartus II (v9.1.1) any help would be great

    • I haven’t personally used an Altera CPLD with this programmer, but I used it to program Xilinx CPLDs successfully. On the HW side, you have to make sure that the cable connecting your programmer to your target is really short. Otherwise, noise on the signals can confuse the CPLD and the programming will fail (I don’t know if Altera CPLDs are also that sensitive). For the SW, this is what I do:
      – Get OpenOCD and make sure it works (not that simple as the version that uses the standard FTDI drivers is not available in binary format and the LibUSB variant takes some fiddling to get working)
      – Get Quartus to generate an SVF file
      – Use OpenOCD to program the SVF file into your CPLD.

      Hope this helps!

  2. Pingback: Linksys USB Jtag cable (WRT54XX)

  3. Do you sell these in a kit form or have the measurements for all of the chips (so that if I were to make it myself with your board design, I could get the right package). I have scoured the Internet for a JTAG programmer that I will know the pinout of and is based on the FT2232, but I have found nothing. Also, before I commit, will this be compatible with a PIC32 and an ATmega chip? I think that it will, but I just want to see if anyone says otherwise. Thank you in advance.

    • Hi!

      Right now I don’t sell any of these boards, but I’m thinking about making them available in kit form. I haven’t tried programming either of these chips with this JTAG debugger, but here’s the general take: if OpenOCD supports your chip you’re golden. If not, you will have to cross your fingers that whatever debugger you use will be able to work with this interface. Chances are it won’t.

      There’s also two things people normally do through JTAG and the answer might be different for the two activities:
      – Debugging: for this you need a debugger that understands both the target CPU and the JTAG interface. This is hard, unless the debugger solution is based on GDB
      – Programming: for this, all you need to do is the toolchain your’re using to generate standard JTAG SVF files. Than, OpenOCD can play those back and program your part, even if it doesn’t specifically knows your device. This is much easier to achieve normally.

      As for your particular parts, unfortunately, it seems neither is supported by OpenOCD directly, and there doesn’t seem to be open-source (GDB-based) debugger support for either of them. You might still be able to program the parts, but debugging doesn’t seem to be possible.

      Andras Tantos

  4. I have a TG782T modem router supplied by my ISP, but it is locked to there specific settings (I.E. not able to be used with other providers), I would like to Jtag this thing so that I can unlock it from them, but I am not sure if this will work or not, can you advise?


    I think one of the chips is a Spansion type chip, the other i don’t know.

    Thank you in advance.

    • I’ve done a little searching around and it seem that your modem is based on the BCM6358 chipset, which has a MIPS CPU at its heart. The Broadcom chip seems to be supported by UrJTAG. Finally UrJTAG should be compatible with this adapter, though you might have to do some customization. All in all, it seems that you can use this adapter for your needs, but let me stress this: I haven’t tried it myself, and haven’t tried my adapter with any MIPS-based platform either. So, I can’t promise anything and YMMV.

      Andras Tantos

  5. Hi!

    I’m Daniel and I would have a question: for ARM Cortex-M3 what development environment would you recommend to be used with your tool?
    Would it be possible to populate the OpenOCD config files and give a short description how to start-up the configuration, how to setup the FTDI?
    Thanks for the help in advance!


    • Daniel,

      This is a good idea. I don’t have anything cleaned up enough to publish, but I have used my JTAG dongle with a Cortex M3-based chip (ST micro). I haven’t used it extensively for debugging, but it was my main flashing tool. The only problem I’ve noticed is that programming is really sensitive to the length of the wires between the JTAG dongle and the main board. This is probably due to bad grounding and the resulting poor signal integrity on the wires. Some chips (Xilinx CPLDs) are more sensitive to this than others (ST microcontroller). I’ve had no problems once I’ve started connecting the dongle directly to the target board.

      Andras Tantos

  6. Hi!
    I’m Áron, and I would have a question about the N-Chanel mosfet you’ve used in the schematic: Is it 2sk1128? Because I’ve been searching on the internet and I haven’t found anything about it, nor some replacement fets. Could I use a general purpose N-fet?
    Thanks in Advice!

  7. Will this circuit still work if one uses the FT232H chip instead of the FT2232H? I understand that the FT232H runs at 12Mbps, against the 480Mbps, but the single channel FT232H is also a bit cheaper than the FT2232H.

    • And also, what about the FT232R, according to FTDI’s site, this chip has onboard EEPROM, which would mean a smaller footprint, and also the 48 pin LQFP package would make for a simpler more compact board layout?

    • No. This circuit was designed for the FT2232D chip. The high-speed ‘H’ series is significantly different. While one can design a circuit with similar functionality, it would not be like this design.

    • It doesn’t matter too much. Almost all aspects of the chip can be reconfigured from the host. The only things you have to set are the VID and PID entries if you’re not happy with the defaults. For most uses, the defaults should work fine.

  8. hi everybody
    i searched alot aboat fpga progremmers and i found this site.
    my question is can i program xilinx fpga with this device?

      • thanks for the reply.
        i have another question:what is different between this device and the xilinx platform cable? i mean what is the advantage of xilinx platform cable?

        • The Xilinx platform cable uses special circuitry. Both can theoretically program any JTAG device, but only the Xilinx cable is integrated into their SW solutions. If you only need to program Xilinx parts, their cable is an easier to use solution. At the same time, not many other SW programs support the Xilinx cable, so if you need a more universal programmer, that can for example program ARM micros as well, the Xilinx cable will not cut it.

  9. I have huawei b683 router i want to install my custom firmware, or atleast mod the current with some changes. What type of jtag will it require, because i want to play it safe and not end up bricking the router completely.

    Thanks for any tips

    • Yes and no. ISE doesn’t support this programmer, but the programmer itself can program Xilinx FPGAs. What you’ll need to do is to generate an SVF file from ISE and use that for programming in OpenOCD.

  10. hi
    in your article what is circuit in ” The heart of the circuit is the FT2232 dual-port USB-to-serial ” ???
    what relevance between SN74AVC4T245,SN74AVC2T245 and level shifter?
    level shifter is a AND Gate???
    i want a circuit that clearly show lelevance between jtag interface and usb interface plz…
    thank you very much..

    • The SN74AVC4T245 chip is not an AND gate. It is a “4-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs” as far as it’s manufacturer, TI is concerned ( It is used in that role as well. The level shifters are needed because the FT2232 only supports the 3.3V CMOS I/O standard and I wanted a programmer that can support other (1.2, 1.8, 2.5, 3.3) standards as well. I hope this helps,


      • you mean without levelshifter coud not program device jtag base with usb?
        in jtag hs2 data sheet is NOT levelshifter…

          • I don’t quite understand your question. JTAG is a digital interface. You have to match it’s logic signalling – which is what the FT2232D chip does – as well as it’s electrical characteristics – which is what the lever-shifters do. In some cases – when the electrical characteristics of the FT2232D and the target JTAG device are identical – you can forgo the level-shifters, in others you can’t. A general purpose tool, such as the one you find on my website tries to match the needs of as wide of a target device range as feasible.

  11. dear sir

    i am engineering student like to develop this USB to JTAG programmer
    i found one EEPROM device 93C56R in the circuit
    is the logic program is available in open source, which programmer i should use it

    can use this circuit to program spartan6 device
    pl. let me know

    • The EEPROM can be programmed through the FTDI chip, no pre-programming is needed. You can generate the content and program it as well using utilities from the FTDI website.

      This JTAG programmer should be able to program a spartan 6 device, though you might have to use an external programmer (like OpenOCD). The Xilinx iMPACT tool might not have support for it.

      I hope this helps,

  12. Dear Sir., I write you because I need drive a JTAG debugger for Freescale MC68376 with “usb to parallel” converter. My debugger software is INTROL4 and runs in DOS-SHELL under WIN98SE in VMWARE Workstation virtual machine. The basic OS system is WINDOWS7 and the PC is a Laptop FUJITSU i7 processor 16GB ram. Have you a converter for my need?
    Best Regards.

  13. Hi sir,
    Thank you very much for the reference.
    I wanted to know how the TRST connection is made for the JTAG programmer using FT2232H. Please explain how a normal GPIO pin acts as reset.

    • A reset pin (TRST or not) is just an input pin with a special function. How you drive it, is up to you. You can drive it with a switch (after proper signal-conditioning) a special reset generator, or – in this case – by a GPIO. There’s really no magic to this. A GPIO, which is programmed from the PC is used to reset certain functions of the target.

      Hope this helps,

  14. Russian translation for this page is beautiful but Latvian is real crap. Girl from Poland can’t translate something to Latvian. She’s used Google automatic translation without any checking later. Tell me, if You need real translation.
    Sorry for that…

    • I would be really happy for a real translation and thanks for letting me know. I have no way of checking the accuracy of the translations. Thanks again!

  15. Nice design! Thanks for making this information available and keeping it online! I can’t believe I did not find this earlier (I spent the $$$ for the Xilinx USB-II programmer). Are these boards currently being produce or sold anywhere?

  16. Hi!
    Me and my friend are doing our master thesis in which we use a xilinx Coolrunner II and we would like to have the jtag on the pcb we’re designing. But there are some things that we don’t know. First, how do you configure the ft2232 to operate in JTAG-mode? Secondly, when thats done is that all?

    • Hi!

      The FT2232 is programmed into JTAG mode using SW running on the host PC. Normally, your programming SW does this, before downloading the bitstream. There is an EEPROM that contains the initial configuration, but it seems that’s read during enumeration, so it’s not terribly useful to set the default function of the pins. In fact, you’ll have to be careful with these chips: on power-up, the pins act like UARTs, and toggle a few times during enumeration. Normally not an issue, but you can run into weird behavior. Best practice (which I’ve learned after this design so it’s not done here) is to use the /PWREN pin to isolate the FT2232 from the rest of the circuit to avoid any issues.

      I hope this helps,
      Andras Tantos

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